Module tartan_arch::x86_common::paging
source · Available on x86 or x86-64 only.
Expand description
Support for virtual memory paging.
Structs
CR2: Contains the address that triggered a page fault.CR3: System control register that contains the top-level page table address
and two associated caching flags.Bottom-level page table entry that maps a single 4KB page.
Second-level page table (page directory) entry that either points to a
bottom-level page table or directly maps a 2MB/4MB page.
Traits
An page table entry (any level) that directly maps a page.
An entry in a page table at any level.
A page table entry (any level) that either directly maps a page or points to another
page table.