Expand description
Data exposed in PCI configuration space.
Structs§
- Base
Address Register - A pointer to a memory or I/O space that is used to interact with the function.
- Command
Register - Control bits set by the host
- Generic
Capability Register - Structure shared by all capability registers
- Header
Register0 - The first register of the standard configuration header for all PCI devices.
- Header
Register1 - The second register of the standard configuration header for all PCI devices.
- Header
Register2 - The third register of the standard configuration header for all PCI devices.
- Header
Register3 - The fourth register of the standard configuration header for all PCI devices.
- Self
Test - Control and status flags for a function’s self test capability, if present.
- Status
Register - Status bits indicated by the function
- Type0
Header Register11 - Twelfth register of the standard configuration header for general-purpose devices
(header type
0x00). - Type0
Header Register13 - Fourtheenth register of the standard configuration header for general-purpose devices.
- Type0
Header Register15 - Sixteenth register of the standard configuration header for general-purpose devices.
Enums§
- Address
Space - Differentiates between memory and I/O addresses
- Address
Width - Size of address bus supported by a PCI function
Traits§
- Fixed
Config Register - A register type that is always located at a specific offset