Module tartan_arch::x86_common::protection
source · Available on x86 or x86-64 only.
Expand description
Support for protected mode operation.
This includes the minimal support for segmented memory and hardware task management that is required to operate in protected mode with a flat memory model.
Structs§
- An entry in a segment descriptor table that points to an existing segment rather than defining a new one.
- Settings for
GateDescriptor
s. - Generic entry in a global/local/interrupt descriptor table. Can be a
SegmentDescriptor
orGateDescriptor
, depending on the type flags. - Settings for
GenericDescriptor
s. GDTR
: Points to the memory range of the global descriptor table (GDT).- Bitmap that controls which I/O port addresses are covered by privilege checks.
- An entry in a segment descriptor table that defines a new segment. This includes code, data, task state (TSS), and local descriptor table (LDT) segments.
- Settings for
SegmentDescriptor
s. - A reference to an entry in a segment descriptor table.
- Discriminate types of segment descriptors that are not code or data.
Enums§
LDTR
: Contains aSelector
referencing aSegmentDescriptor
that points to the the local descriptor table (LDT).TR
: Contains aSelector
referencing aSegmentDescriptor
that points to the current task state segment (TSS).
Traits§
- Settings common to
SegmentDescriptor
s andGateDescriptor
s.