Struct UARTPL011

pub struct UARTPL011<'a> {
    pub register_block: &'a mut RegisterBlock,
    pub base_clock_rate: u32,
}

Driver for the PL011 UART.

Fields

register_block: &'a mut RegisterBlock

Memory-mapped registers for this device.

base_clock_rate: u32

Frequency, in hertz, of the clock input to the UART.

Trait Implementations

impl UART for UARTPL011<'_>

fn reset(&mut self)

Stop transmission, clear buffers, and set the device to a sane state.

fn line_mode(&mut self) -> LineMode

Get the device’s active line protocol mode.

fn set_line_mode(&mut self, line_mode: LineMode)

Update the device’s line protocol mode.

fn write(&mut self, data: &[u8])

Send the given data through the UART. Blocks until all data is set.