#[repr(transparent)]
pub struct ControlRegister0(_);
Available on x86 or x86-64 only.
Expand description

CR0: System control register with flags affecting protection, paging, and FPU behavior.

Getters and setters for this structure only access a value in memory, not the register itself. Use the get and set methods to work with the actual register.

Implementations§

CR0.PG: Enable paging. Requires protected_mode.

CR0.CD: Disable all memory caching.

CR0.NW: Disable write-back/write-through caching.

CR0.AM: Enables strict alignment checks for memory access, in combination with FlagRegister::alignment_check_or_access_control.

CR0.WP: Enforce read-only pages even in privilege levels 0–2. They are always enforced in level 3.

CR0.NE: Use internal error mechanism for FPU errors, rather than DOS-style.

CR0.ET: On 386/486, 387 FPU instructions are supported if set. Always set on modern processors.

CR0.TS: Set by processor when task was switched but FPU context has not been saved yet.

Used to save work when the new task does not alter the FPU state. When an FPU instruction is executed with this flag set, the processor raises an exception that allows the OS to save the FPU state. This behavior can be altered by other flags. See monitor_fpu_state.

CR0.EM: Trigger an exception on all FPU instructions. Used to support software emulation.

CR0.MP: Enable exception behavior described for the CR0.TS flag for the (F)WAIT instruction.

Enable protected mode. Does not enable paging on its own. See paging.

CR0.PG: Enable paging. Requires protected_mode.

CR0.PG: Enable paging. Requires protected_mode.

CR0.CD: Disable all memory caching.

CR0.CD: Disable all memory caching.

CR0.NW: Disable write-back/write-through caching.

CR0.NW: Disable write-back/write-through caching.

CR0.AM: Enables strict alignment checks for memory access, in combination with FlagRegister::alignment_check_or_access_control.

CR0.AM: Enables strict alignment checks for memory access, in combination with FlagRegister::alignment_check_or_access_control.

CR0.WP: Enforce read-only pages even in privilege levels 0–2. They are always enforced in level 3.

CR0.WP: Enforce read-only pages even in privilege levels 0–2. They are always enforced in level 3.

CR0.NE: Use internal error mechanism for FPU errors, rather than DOS-style.

CR0.NE: Use internal error mechanism for FPU errors, rather than DOS-style.

CR0.ET: On 386/486, 387 FPU instructions are supported if set. Always set on modern processors.

CR0.ET: On 386/486, 387 FPU instructions are supported if set. Always set on modern processors.

CR0.TS: Set by processor when task was switched but FPU context has not been saved yet.

Used to save work when the new task does not alter the FPU state. When an FPU instruction is executed with this flag set, the processor raises an exception that allows the OS to save the FPU state. This behavior can be altered by other flags. See monitor_fpu_state.

CR0.TS: Set by processor when task was switched but FPU context has not been saved yet.

Used to save work when the new task does not alter the FPU state. When an FPU instruction is executed with this flag set, the processor raises an exception that allows the OS to save the FPU state. This behavior can be altered by other flags. See monitor_fpu_state.

CR0.EM: Trigger an exception on all FPU instructions. Used to support software emulation.

CR0.EM: Trigger an exception on all FPU instructions. Used to support software emulation.

CR0.MP: Enable exception behavior described for the CR0.TS flag for the (F)WAIT instruction.

CR0.MP: Enable exception behavior described for the CR0.TS flag for the (F)WAIT instruction.

Enable protected mode. Does not enable paging on its own. See paging.

Enable protected mode. Does not enable paging on its own. See paging.

Retrieve the current value of this register

Update the register to the given value.

Safety

Altering certain system flags can have dramatic effects on the execution of this and other programs, including memory safety.

Directly clear the task_switched_without_fpu_state flag in this register using a single instruction.

Safety

Clearing this flag when inappropriate may clobber FPU state and potentially affect memory safety.

Trait Implementations§

Construct a new bitfield type from its underlying representation
Unwrap the bitfield into its underlying representation
Returns a copy of the value. Read more
Performs copy-assignment from source. Read more
Formats the value using the given formatter. Read more
Returns the “default value” for a type. Read more
Converts to this type from the input type.
Converts to this type from the input type.
This method tests for self and other values to be equal, and is used by ==. Read more
This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason. Read more

Auto Trait Implementations§

Blanket Implementations§

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.