Struct tartan_arch::x86_common::ControlRegister0
source · pub struct ControlRegister0(/* private fields */);
Expand description
Implementations§
source§impl ControlRegister0
impl ControlRegister0
sourcepub fn paging(&self) -> bool
pub fn paging(&self) -> bool
CR0.PG
: Enable paging. Requires protected_mode
.
sourcepub fn cache_disabled(&self) -> bool
pub fn cache_disabled(&self) -> bool
CR0.CD
: Disable all memory caching.
sourcepub fn cache_not_write_through(&self) -> bool
pub fn cache_not_write_through(&self) -> bool
CR0.NW
: Disable write-back/write-through caching.
sourcepub fn alignment_check_mask(&self) -> bool
pub fn alignment_check_mask(&self) -> bool
CR0.AM
: Enables strict alignment checks for memory access, in combination
with FlagRegister::alignment_check_or_access_control
.
sourcepub fn write_protect(&self) -> bool
pub fn write_protect(&self) -> bool
CR0.WP
: Enforce read-only pages even in privilege levels 0–2. They are
always enforced in level 3.
sourcepub fn native_fpu_error(&self) -> bool
pub fn native_fpu_error(&self) -> bool
CR0.NE
: Use internal error mechanism for FPU errors, rather than DOS-style.
sourcepub fn fpu_extension_type(&self) -> bool
pub fn fpu_extension_type(&self) -> bool
CR0.ET
: On 386/486, 387 FPU instructions are supported if set. Always set
on modern processors.
sourcepub fn task_switched_without_fpu_state(&self) -> bool
pub fn task_switched_without_fpu_state(&self) -> bool
CR0.TS
: Set by processor when task was switched but FPU context has not been
saved yet.
Used to save work when the new task does not alter the FPU state. When an FPU
instruction is executed with this flag set, the processor raises an exception
that allows the OS to save the FPU state. This behavior can be altered by
other flags. See monitor_fpu_state
.
sourcepub fn fpu_emulation(&self) -> bool
pub fn fpu_emulation(&self) -> bool
CR0.EM
: Trigger an exception on all FPU instructions. Used to support
software emulation.
sourcepub fn monitor_fpu(&self) -> bool
pub fn monitor_fpu(&self) -> bool
CR0.MP
: Enable exception behavior described for the CR0.TS
flag for the
(F
)WAIT
instruction.
sourcepub fn protected_mode(&self) -> bool
pub fn protected_mode(&self) -> bool
Enable protected mode. Does not enable paging on its own. See
paging
.
sourcepub fn set_paging(&mut self, value: bool)
pub fn set_paging(&mut self, value: bool)
CR0.PG
: Enable paging. Requires protected_mode
.
sourcepub fn with_paging(&mut self, value: bool) -> Self
pub fn with_paging(&mut self, value: bool) -> Self
CR0.PG
: Enable paging. Requires protected_mode
.
sourcepub fn set_cache_disabled(&mut self, value: bool)
pub fn set_cache_disabled(&mut self, value: bool)
CR0.CD
: Disable all memory caching.
sourcepub fn with_cache_disabled(&mut self, value: bool) -> Self
pub fn with_cache_disabled(&mut self, value: bool) -> Self
CR0.CD
: Disable all memory caching.
sourcepub fn set_cache_not_write_through(&mut self, value: bool)
pub fn set_cache_not_write_through(&mut self, value: bool)
CR0.NW
: Disable write-back/write-through caching.
sourcepub fn with_cache_not_write_through(&mut self, value: bool) -> Self
pub fn with_cache_not_write_through(&mut self, value: bool) -> Self
CR0.NW
: Disable write-back/write-through caching.
sourcepub fn set_alignment_check_mask(&mut self, value: bool)
pub fn set_alignment_check_mask(&mut self, value: bool)
CR0.AM
: Enables strict alignment checks for memory access, in combination
with FlagRegister::alignment_check_or_access_control
.
sourcepub fn with_alignment_check_mask(&mut self, value: bool) -> Self
pub fn with_alignment_check_mask(&mut self, value: bool) -> Self
CR0.AM
: Enables strict alignment checks for memory access, in combination
with FlagRegister::alignment_check_or_access_control
.
sourcepub fn set_write_protect(&mut self, value: bool)
pub fn set_write_protect(&mut self, value: bool)
CR0.WP
: Enforce read-only pages even in privilege levels 0–2. They are
always enforced in level 3.
sourcepub fn with_write_protect(&mut self, value: bool) -> Self
pub fn with_write_protect(&mut self, value: bool) -> Self
CR0.WP
: Enforce read-only pages even in privilege levels 0–2. They are
always enforced in level 3.
sourcepub fn set_native_fpu_error(&mut self, value: bool)
pub fn set_native_fpu_error(&mut self, value: bool)
CR0.NE
: Use internal error mechanism for FPU errors, rather than DOS-style.
sourcepub fn with_native_fpu_error(&mut self, value: bool) -> Self
pub fn with_native_fpu_error(&mut self, value: bool) -> Self
CR0.NE
: Use internal error mechanism for FPU errors, rather than DOS-style.
sourcepub fn set_fpu_extension_type(&mut self, value: bool)
pub fn set_fpu_extension_type(&mut self, value: bool)
CR0.ET
: On 386/486, 387 FPU instructions are supported if set. Always set
on modern processors.
sourcepub fn with_fpu_extension_type(&mut self, value: bool) -> Self
pub fn with_fpu_extension_type(&mut self, value: bool) -> Self
CR0.ET
: On 386/486, 387 FPU instructions are supported if set. Always set
on modern processors.
sourcepub fn set_task_switched_without_fpu_state(&mut self, value: bool)
pub fn set_task_switched_without_fpu_state(&mut self, value: bool)
CR0.TS
: Set by processor when task was switched but FPU context has not been
saved yet.
Used to save work when the new task does not alter the FPU state. When an FPU
instruction is executed with this flag set, the processor raises an exception
that allows the OS to save the FPU state. This behavior can be altered by
other flags. See monitor_fpu_state
.
sourcepub fn with_task_switched_without_fpu_state(&mut self, value: bool) -> Self
pub fn with_task_switched_without_fpu_state(&mut self, value: bool) -> Self
CR0.TS
: Set by processor when task was switched but FPU context has not been
saved yet.
Used to save work when the new task does not alter the FPU state. When an FPU
instruction is executed with this flag set, the processor raises an exception
that allows the OS to save the FPU state. This behavior can be altered by
other flags. See monitor_fpu_state
.
sourcepub fn set_fpu_emulation(&mut self, value: bool)
pub fn set_fpu_emulation(&mut self, value: bool)
CR0.EM
: Trigger an exception on all FPU instructions. Used to support
software emulation.
sourcepub fn with_fpu_emulation(&mut self, value: bool) -> Self
pub fn with_fpu_emulation(&mut self, value: bool) -> Self
CR0.EM
: Trigger an exception on all FPU instructions. Used to support
software emulation.
sourcepub fn set_monitor_fpu(&mut self, value: bool)
pub fn set_monitor_fpu(&mut self, value: bool)
CR0.MP
: Enable exception behavior described for the CR0.TS
flag for the
(F
)WAIT
instruction.
sourcepub fn with_monitor_fpu(&mut self, value: bool) -> Self
pub fn with_monitor_fpu(&mut self, value: bool) -> Self
CR0.MP
: Enable exception behavior described for the CR0.TS
flag for the
(F
)WAIT
instruction.
sourcepub fn set_protected_mode(&mut self, value: bool)
pub fn set_protected_mode(&mut self, value: bool)
Enable protected mode. Does not enable paging on its own. See
paging
.
sourcepub fn with_protected_mode(&mut self, value: bool) -> Self
pub fn with_protected_mode(&mut self, value: bool) -> Self
Enable protected mode. Does not enable paging on its own. See
paging
.
source§impl ControlRegister0
impl ControlRegister0
sourcepub unsafe fn clear_task_switched_without_fpu_state()
pub unsafe fn clear_task_switched_without_fpu_state()
Directly clear the
task_switched_without_fpu_state
flag in
this register using a single instruction.
§Safety
Clearing this flag when inappropriate may clobber FPU state and potentially affect memory safety.
Trait Implementations§
source§impl Bitfield<usize> for ControlRegister0
impl Bitfield<usize> for ControlRegister0
source§impl Clone for ControlRegister0
impl Clone for ControlRegister0
source§fn clone(&self) -> ControlRegister0
fn clone(&self) -> ControlRegister0
1.0.0 · source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read moresource§impl Debug for ControlRegister0
impl Debug for ControlRegister0
source§impl Default for ControlRegister0
impl Default for ControlRegister0
source§fn default() -> ControlRegister0
fn default() -> ControlRegister0
source§impl From<ControlRegister0> for usize
impl From<ControlRegister0> for usize
source§fn from(val: ControlRegister0) -> Self
fn from(val: ControlRegister0) -> Self
source§impl From<usize> for ControlRegister0
impl From<usize> for ControlRegister0
source§impl PartialEq for ControlRegister0
impl PartialEq for ControlRegister0
impl Copy for ControlRegister0
impl Eq for ControlRegister0
impl StructuralPartialEq for ControlRegister0
Auto Trait Implementations§
impl Freeze for ControlRegister0
impl RefUnwindSafe for ControlRegister0
impl Send for ControlRegister0
impl Sync for ControlRegister0
impl Unpin for ControlRegister0
impl UnwindSafe for ControlRegister0
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§default unsafe fn clone_to_uninit(&self, dst: *mut T)
default unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)source§impl<T> CloneToUninit for Twhere
T: Copy,
impl<T> CloneToUninit for Twhere
T: Copy,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)