#[repr(transparent)]
pub struct FlagRegister(_);
Available on x86 or x86-64 only.
Expand description

EFLAGS/RFLAGS: General flags, including control, status, and basic system flags.

Getters and setters for this structure only access a value in memory, not the register itself. Use the get and set methods to work with the actual register.

Implementations§

CF: Indicates an arithmetic instruction generated a carry/borrow (unsigned overflow).

PF: Indicates that the least-significant byte of the result has even parity.

AF: Indicates a carry/borrow/overflow out of bit 3 in binary-coded decimal (BCD) arithmetic.

ZF: Indicates that the result of an instruction is zero.

SF: Indicates that the most-significant bit of a result is 1.

TF: Enable single-step debugging.

IF: Enable non-maskable interrupts. Non-maskable interrupts are always enabled.

DF: String instructions work on addresses high-to-low when set, low-to-high when clear.

OF: Indicates that the result overflowed for signed arithmetic (carry/borrow for the second-most-significant bit).

IOPL: Sets the privilege threshold for a task to access I/O address space. Smaller numbers are higher privilege.

Individual I/O ports may still be accessible at lower privilege levels (greater numeric values) if allowed by IOPermissionBitmap for the current task.

NT: Indicates that the processor should switch back to a parent task when it executes an IRET instruction.

Only supported in 32-bit mode. If this is set in 64-bit mode, IRET will trigger an exception.

RF: Disable instruction breakpoints.

VM: Enable virtual real mode.

AC: Enable strict alignment checks for memory accesses in privilege level 3. In privilege levels 0–2, allow access to pages assigned to lower privilege levels.

Alignment checking requires ControlRegister0::alignment_check_mask. Access protection requires ControlRegister4::supervisor_access_prevention.

VIF: Virtual counterpart to the interrupt_enabled flag, used with VME or PVI.

VIP: Indicates an interrupt is pending for VME or PVI.

ID: Indicates CPUID support when the flag is modifiable.

CF: Indicates an arithmetic instruction generated a carry/borrow (unsigned overflow).

CF: Indicates an arithmetic instruction generated a carry/borrow (unsigned overflow).

PF: Indicates that the least-significant byte of the result has even parity.

PF: Indicates that the least-significant byte of the result has even parity.

AF: Indicates a carry/borrow/overflow out of bit 3 in binary-coded decimal (BCD) arithmetic.

AF: Indicates a carry/borrow/overflow out of bit 3 in binary-coded decimal (BCD) arithmetic.

ZF: Indicates that the result of an instruction is zero.

ZF: Indicates that the result of an instruction is zero.

SF: Indicates that the most-significant bit of a result is 1.

SF: Indicates that the most-significant bit of a result is 1.

TF: Enable single-step debugging.

TF: Enable single-step debugging.

IF: Enable non-maskable interrupts. Non-maskable interrupts are always enabled.

IF: Enable non-maskable interrupts. Non-maskable interrupts are always enabled.

DF: String instructions work on addresses high-to-low when set, low-to-high when clear.

DF: String instructions work on addresses high-to-low when set, low-to-high when clear.

OF: Indicates that the result overflowed for signed arithmetic (carry/borrow for the second-most-significant bit).

OF: Indicates that the result overflowed for signed arithmetic (carry/borrow for the second-most-significant bit).

IOPL: Sets the privilege threshold for a task to access I/O address space. Smaller numbers are higher privilege.

Individual I/O ports may still be accessible at lower privilege levels (greater numeric values) if allowed by IOPermissionBitmap for the current task.

IOPL: Sets the privilege threshold for a task to access I/O address space. Smaller numbers are higher privilege.

Individual I/O ports may still be accessible at lower privilege levels (greater numeric values) if allowed by IOPermissionBitmap for the current task.

NT: Indicates that the processor should switch back to a parent task when it executes an IRET instruction.

Only supported in 32-bit mode. If this is set in 64-bit mode, IRET will trigger an exception.

NT: Indicates that the processor should switch back to a parent task when it executes an IRET instruction.

Only supported in 32-bit mode. If this is set in 64-bit mode, IRET will trigger an exception.

RF: Disable instruction breakpoints.

RF: Disable instruction breakpoints.

VM: Enable virtual real mode.

VM: Enable virtual real mode.

AC: Enable strict alignment checks for memory accesses in privilege level 3. In privilege levels 0–2, allow access to pages assigned to lower privilege levels.

Alignment checking requires ControlRegister0::alignment_check_mask. Access protection requires ControlRegister4::supervisor_access_prevention.

AC: Enable strict alignment checks for memory accesses in privilege level 3. In privilege levels 0–2, allow access to pages assigned to lower privilege levels.

Alignment checking requires ControlRegister0::alignment_check_mask. Access protection requires ControlRegister4::supervisor_access_prevention.

VIF: Virtual counterpart to the interrupt_enabled flag, used with VME or PVI.

VIF: Virtual counterpart to the interrupt_enabled flag, used with VME or PVI.

VIP: Indicates an interrupt is pending for VME or PVI.

VIP: Indicates an interrupt is pending for VME or PVI.

ID: Indicates CPUID support when the flag is modifiable.

ID: Indicates CPUID support when the flag is modifiable.

Retrieve the current value of the EFLAGS register.

Update the EFLAGS register with the given value, as permission level allows.

Some flags will be unaffected depending on the processor mode and permission level flags. See the reference for the POPF instruction in the Intel 64 and IA-32 Architectures Software Developer’s Manual, volume 2.

Safety

Altering certain system flags can have dramatic effects on the execution of this and other programs, including memory safety. See volume 1 §3.4.3 (“EFLAGS Register”) and volume 3 §2.3 (“System Flags and Fields in the EFLAGS Register”) of the Intel 64 and IA-32 Architectures Software Developer’s Manual.

Trait Implementations§

Construct a new bitfield type from its underlying representation
Unwrap the bitfield into its underlying representation
Returns a copy of the value. Read more
Performs copy-assignment from source. Read more
Formats the value using the given formatter. Read more
Returns the “default value” for a type. Read more
Converts to this type from the input type.
Converts to this type from the input type.
This method tests for self and other values to be equal, and is used by ==. Read more
This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason. Read more

Auto Trait Implementations§

Blanket Implementations§

Gets the TypeId of self. Read more
Immutably borrows from an owned value. Read more
Mutably borrows from an owned value. Read more

Returns the argument unchanged.

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

The type returned in the event of a conversion error.
Performs the conversion.
The type returned in the event of a conversion error.
Performs the conversion.