pub struct ExtendedControlRegister0(/* private fields */);
Expand description
XCR0
: System control flags that indicate OS support for context management for
various registers with the XSAVE
feature.
Getters and setters for this structure only access a value in memory, not the
register itself. Use the get
and set
methods to
work with the actual register.
Requires BasicFeatures::extended_state_save
.
Implementations§
Source§impl ExtendedControlRegister0
impl ExtendedControlRegister0
Sourcepub fn avx_256(&self) -> bool
pub fn avx_256(&self) -> bool
XCR0.AVX
: Manage 256-bit AVX state in upper halves of the YMM
registers
with XSAVE
.
Requires sse
. The lower halves of these registers are
equivalent to XMM
and are covered by that flag.
Sourcepub fn mpx_bounds(&self) -> bool
pub fn mpx_bounds(&self) -> bool
XCR0.BNDREG
: Manage MPX bounds registers with XSAVE
.
Requires mpx_bound_config_status
.
Sourcepub fn mpx_bound_config_status(&self) -> bool
pub fn mpx_bound_config_status(&self) -> bool
XCR0.BNDCSR
: Manage MPX config and status registers with XSAVE
.
Requires mpx_bounds
.
Sourcepub fn avx_512_opmask(&self) -> bool
pub fn avx_512_opmask(&self) -> bool
XCR0.OPMASK
: Manage AVX-512 opmask registers with XSAVE
.
Requires the other avx_512_*
flags.
Sourcepub fn avx_512(&self) -> bool
pub fn avx_512(&self) -> bool
XCR0.ZMM_Hi256
: Manage 512-bit AVX state in the upper halves of the ZMM
registers up to ZMM15
with XSAVE
.
Registers ZMM8
–ZMM15
are available in 64-bit mode only, so this only
applies up to ZMM7
in 32-bit mode.
Requires avx_256
and the other avx_512_*
flags. The lower
halves of these registers are equivalent to YMM
and are covered by
avx_256
(Self::avx_256).
Sourcepub fn avx_512_extended(&self) -> bool
Available on x86-64 only.
pub fn avx_512_extended(&self) -> bool
XCR0.Hi16_ZMM
: Manage AVX-512 state in ZMM16
–ZMM31
with XSAVE
.
These registers are only available in 64-bit mode.
Requires the other avx_512_*
flags.
Sourcepub fn protection_key_rights(&self) -> bool
pub fn protection_key_rights(&self) -> bool
XCR0.PKRU
: Manage protection key rights registers with XSAVE
.
Sourcepub fn set_sse(&mut self, value: bool)
pub fn set_sse(&mut self, value: bool)
XCR0.SSE
: Manage SSE state with XSAVE
, including the XMM
registers.
Sourcepub fn with_sse(&mut self, value: bool) -> Self
pub fn with_sse(&mut self, value: bool) -> Self
XCR0.SSE
: Manage SSE state with XSAVE
, including the XMM
registers.
Sourcepub fn set_avx_256(&mut self, value: bool)
pub fn set_avx_256(&mut self, value: bool)
XCR0.AVX
: Manage 256-bit AVX state in upper halves of the YMM
registers
with XSAVE
.
Requires sse
. The lower halves of these registers are
equivalent to XMM
and are covered by that flag.
Sourcepub fn with_avx_256(&mut self, value: bool) -> Self
pub fn with_avx_256(&mut self, value: bool) -> Self
XCR0.AVX
: Manage 256-bit AVX state in upper halves of the YMM
registers
with XSAVE
.
Requires sse
. The lower halves of these registers are
equivalent to XMM
and are covered by that flag.
Sourcepub fn set_mpx_bounds(&mut self, value: bool)
pub fn set_mpx_bounds(&mut self, value: bool)
XCR0.BNDREG
: Manage MPX bounds registers with XSAVE
.
Requires mpx_bound_config_status
.
Sourcepub fn with_mpx_bounds(&mut self, value: bool) -> Self
pub fn with_mpx_bounds(&mut self, value: bool) -> Self
XCR0.BNDREG
: Manage MPX bounds registers with XSAVE
.
Requires mpx_bound_config_status
.
Sourcepub fn set_mpx_bound_config_status(&mut self, value: bool)
pub fn set_mpx_bound_config_status(&mut self, value: bool)
XCR0.BNDCSR
: Manage MPX config and status registers with XSAVE
.
Requires mpx_bounds
.
Sourcepub fn with_mpx_bound_config_status(&mut self, value: bool) -> Self
pub fn with_mpx_bound_config_status(&mut self, value: bool) -> Self
XCR0.BNDCSR
: Manage MPX config and status registers with XSAVE
.
Requires mpx_bounds
.
Sourcepub fn set_avx_512_opmask(&mut self, value: bool)
pub fn set_avx_512_opmask(&mut self, value: bool)
XCR0.OPMASK
: Manage AVX-512 opmask registers with XSAVE
.
Requires the other avx_512_*
flags.
Sourcepub fn with_avx_512_opmask(&mut self, value: bool) -> Self
pub fn with_avx_512_opmask(&mut self, value: bool) -> Self
XCR0.OPMASK
: Manage AVX-512 opmask registers with XSAVE
.
Requires the other avx_512_*
flags.
Sourcepub fn set_avx_512(&mut self, value: bool)
pub fn set_avx_512(&mut self, value: bool)
XCR0.ZMM_Hi256
: Manage 512-bit AVX state in the upper halves of the ZMM
registers up to ZMM15
with XSAVE
.
Registers ZMM8
–ZMM15
are available in 64-bit mode only, so this only
applies up to ZMM7
in 32-bit mode.
Requires avx_256
and the other avx_512_*
flags. The lower
halves of these registers are equivalent to YMM
and are covered by
avx_256
(Self::avx_256).
Sourcepub fn with_avx_512(&mut self, value: bool) -> Self
pub fn with_avx_512(&mut self, value: bool) -> Self
XCR0.ZMM_Hi256
: Manage 512-bit AVX state in the upper halves of the ZMM
registers up to ZMM15
with XSAVE
.
Registers ZMM8
–ZMM15
are available in 64-bit mode only, so this only
applies up to ZMM7
in 32-bit mode.
Requires avx_256
and the other avx_512_*
flags. The lower
halves of these registers are equivalent to YMM
and are covered by
avx_256
(Self::avx_256).
Sourcepub fn set_avx_512_extended(&mut self, value: bool)
Available on x86-64 only.
pub fn set_avx_512_extended(&mut self, value: bool)
XCR0.Hi16_ZMM
: Manage AVX-512 state in ZMM16
–ZMM31
with XSAVE
.
These registers are only available in 64-bit mode.
Requires the other avx_512_*
flags.
Sourcepub fn with_avx_512_extended(&mut self, value: bool) -> Self
Available on x86-64 only.
pub fn with_avx_512_extended(&mut self, value: bool) -> Self
XCR0.Hi16_ZMM
: Manage AVX-512 state in ZMM16
–ZMM31
with XSAVE
.
These registers are only available in 64-bit mode.
Requires the other avx_512_*
flags.
Sourcepub fn set_protection_key_rights(&mut self, value: bool)
pub fn set_protection_key_rights(&mut self, value: bool)
XCR0.PKRU
: Manage protection key rights registers with XSAVE
.
Sourcepub fn with_protection_key_rights(&mut self, value: bool) -> Self
pub fn with_protection_key_rights(&mut self, value: bool) -> Self
XCR0.PKRU
: Manage protection key rights registers with XSAVE
.
Trait Implementations§
Source§impl Bitfield<u64> for ExtendedControlRegister0
impl Bitfield<u64> for ExtendedControlRegister0
Source§impl Clone for ExtendedControlRegister0
impl Clone for ExtendedControlRegister0
Source§fn clone(&self) -> ExtendedControlRegister0
fn clone(&self) -> ExtendedControlRegister0
1.0.0 · Source§fn clone_from(&mut self, source: &Self)
fn clone_from(&mut self, source: &Self)
source
. Read more